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[EXAMPLES] Ported the mojo counter example to Zynq ZED board.

Will be adding a tutorial on this to verilog.james.walms.co.uk in a few days.
This commit is contained in:
James Walmsley 2013-10-27 21:48:39 +01:00
parent f39c0c9928
commit 40b3551b45
4 changed files with 56 additions and 0 deletions

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#!/bin/bash
set -ex
XILINX_DIR=/opt/Xilinx/14.7/ISE_DS/ISE
XILINX_PART=xc7z020clg484-1
yosys - <<- EOT
read_verilog example.v
synth_xilinx -edif synth.edif
EOT
$XILINX_DIR/bin/lin64/edif2ngd -a synth.edif synth.ngo
$XILINX_DIR/bin/lin64/ngdbuild -p $XILINX_PART -uc example.ucf synth.ngo synth.ngd
$XILINX_DIR/bin/lin64/map -p $XILINX_PART -w -o mapped.ncd synth.ngd constraints.pcf
$XILINX_DIR/bin/lin64/par -w mapped.ncd placed.ncd constraints.pcf
$XILINX_DIR/bin/lin64/bitgen -w placed.ncd example.bit constraints.pcf
$XILINX_DIR/bin/lin64/promgen -w -b -p bin -o example.bin -u 0 example.bit -data_width 32