From 408077769ff022f78f10ec1ffb60926361f8dc9f Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 22 Aug 2018 17:22:24 +0200
Subject: [PATCH] Add "verific -work" help message

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---
 frontends/verific/verific.cc | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index cb31634dd..1dd6d7e24 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -1706,11 +1706,18 @@ struct VerificPass : public Pass {
 		log("\n");
 		log("Like -sv, but define FORMAL instead of SYNTHESIS.\n");
 		log("\n");
+		log("\n");
 		log("    verific {-vhdl87|-vhdl93|-vhdl2k|-vhdl2008|-vhdl} <vhdl-file>..\n");
 		log("\n");
 		log("Load the specified VHDL files into Verific.\n");
 		log("\n");
 		log("\n");
+		log("    verific -work <libname> {-sv|-vhdl|...} <hdl-file>\n");
+		log("\n");
+		log("Load the specified Verilog/SystemVerilog/VHDL file into the specified library.\n");
+		log("(default library when -work is not present: \"work\")\n");
+		log("\n");
+		log("\n");
 		log("    verific -vlog-incdir <directory>..\n");
 		log("\n");
 		log("Add Verilog include directories.\n");