diff --git a/tests/various/abstract_init.ys b/tests/various/abstract_init.ys
index 06f29153c..2e0cf2e64 100644
--- a/tests/various/abstract_init.ys
+++ b/tests/various/abstract_init.ys
@@ -52,10 +52,16 @@ EOT
 proc
 opt_expr
 opt_dff
+design -save basic
 select -assert-count 1 w:Q a:init=2'b01 %i
 abstract -init -slice 0 w:Q
 check -assert
 select -assert-count 1 w:Q a:init=2'b0x %i
+design -load basic
+select -assert-count 1 w:Q a:init=2'b01 %i
+abstract -init -slice 0:1 w:Q
+check -assert
+select -assert-count 0 w:Q a:init %i
 
 design -reset
 read_verilog <<EOT