mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00
Code Activity

Added hex constant support to write_verilog

Browse source
This commit is contained in:
Clifford Wolf 2016-11-03 12:13:23 +01:00
parent e3330fb98f
commit 3db2ac4e00
2 changed files with 63 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

2
techlibs/gowin/synth_gowin.cc
View file

@ -169,7 +169,7 @@ struct SynthGowinPass : public ScriptPass
if (check_label("vout"))
{
if (!vout_file.empty() || help_mode)
run(stringf("write_verilog -attr2comment -defparam -renameprefix gen %s",
run(stringf("write_verilog -nodec -attr2comment -defparam -renameprefix gen %s",
help_mode ? "<file-name>" : vout_file.c_str()));
}
}