diff --git a/passes/cmds/Makefile.inc b/passes/cmds/Makefile.inc index 4ecaea7dd..5a48072a9 100644 --- a/passes/cmds/Makefile.inc +++ b/passes/cmds/Makefile.inc @@ -56,3 +56,4 @@ OBJS += passes/cmds/setenv.o OBJS += passes/cmds/abstract.o OBJS += passes/cmds/test_select.o OBJS += passes/cmds/timeest.o +OBJS += passes/cmds/publish.o diff --git a/passes/cmds/publish.cc b/passes/cmds/publish.cc new file mode 100644 index 000000000..fda8d361b --- /dev/null +++ b/passes/cmds/publish.cc @@ -0,0 +1,40 @@ +#include "kernel/register.h" +#include "kernel/rtlil.h" +#include "kernel/log.h" + +USING_YOSYS_NAMESPACE +PRIVATE_NAMESPACE_BEGIN + +struct PublishPass : public Pass { +private: + static void publish(RTLIL::IdString& id) { + if (id.begins_with("$")) { + log_debug("publishing %s\n", id.c_str()); + id = "\\" + id.str(); + log_debug("published %s\n", id.c_str()); + } + } +public: + PublishPass() : Pass("publish", "publish private cell types") { } + void help() override + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" publish\n"); + log("Makes all module names and cell types public by prefixing\n"); + log("% with \\.\n"); + } + void execute(std::vector args, RTLIL::Design *design) override + { + log_header(design, "Executing PUBLISH pass. (make cell types public)\n"); + extra_args(args, 1, design); + for (auto& [name, mod] : design->modules_) { + publish(name); + publish(mod->name); + for (auto* cell : mod->cells()) + publish(cell->type); + } + } +} PublishPass; + +PRIVATE_NAMESPACE_END