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Adding latch tests for shift&mask AST dynamic part-select enhancements
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18 changed files with 326 additions and 69 deletions
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`default_nettype none
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module reversed_gate (clk, ctrl, din, sel, dout);
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input clk;
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input [4:0] ctrl;
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input [15:0] din;
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input [3:0] sel;
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input wire clk;
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input wire [4:0] ctrl;
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input wire [15:0] din;
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input wire [3:0] sel;
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output reg [31:0] dout;
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always @(posedge clk)
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case ((({(32)-((ctrl)*(sel))})+(1))-(2))
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