3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-29 20:05:52 +00:00

Adding latch tests for shift&mask AST dynamic part-select enhancements

This commit is contained in:
diego 2020-06-09 15:17:01 -05:00
parent 5c426d2bff
commit 3c2a1171ff
18 changed files with 326 additions and 69 deletions

View file

@ -1,8 +1,10 @@
module reset_test_gate (clk, ctrl, din, sel, dout);
input clk;
input [4:0] ctrl;
input [1:0] din;
input [0:0] sel;
`default_nettype none
module reset_test_gate (clk, reset, ctrl, din, sel, dout);
input wire clk;
input wire reset;
input wire [4:0] ctrl;
input wire [1:0] din;
input wire [0:0] sel;
output reg [31:0] dout;
reg [1:0] i;
wire [0:0] rval;