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Adding latch tests for shift&mask AST dynamic part-select enhancements

This commit is contained in:
diego 2020-06-09 15:17:01 -05:00
parent 5c426d2bff
commit 3c2a1171ff
18 changed files with 326 additions and 69 deletions

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`default_nettype none
module latch_002
(dword, sel, st, vect);
output reg [63:0] dword;
input wire [7:0] vect;
input wire [7:0] sel;
input wire st;
always @(*) begin
if (st)
dword[8*sel +:8] <= vect[7:0];
end
endmodule // latch_002