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Addressed code review comments

This commit is contained in:
Miodrag Milanovic 2023-08-25 11:10:20 +02:00
parent 541c1ab567
commit 3b9ebfa672
11 changed files with 21 additions and 104 deletions

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@ -2,7 +2,7 @@ read_verilog ../common/lutram.v
hierarchy -top lutram_1w1r
proc
memory -nomap
equiv_opt -run :prove -map +/lattice/cells_sim_xo2.v synth_machxo2 -nowidelut
equiv_opt -run :prove -map +/lattice/cells_sim_xo2.v synth_lattice -family xo2 -nowidelut
memory
opt -full