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	Merge pull request #2403 from nakengelhardt/sim_timescale
sim -vcd: add date, version, and option for timescale
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						commit
						3b86b5da5f
					
				
					 1 changed files with 21 additions and 0 deletions
				
			
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					@ -22,6 +22,8 @@
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#include "kernel/celltypes.h"
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					#include "kernel/celltypes.h"
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#include "kernel/mem.h"
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					#include "kernel/mem.h"
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					#include <ctime>
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USING_YOSYS_NAMESPACE
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					USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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					PRIVATE_NAMESPACE_BEGIN
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					@ -620,6 +622,7 @@ struct SimWorker : SimShared
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	SimInstance *top = nullptr;
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						SimInstance *top = nullptr;
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	std::ofstream vcdfile;
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						std::ofstream vcdfile;
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	pool<IdString> clock, clockn, reset, resetn;
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						pool<IdString> clock, clockn, reset, resetn;
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						std::string timescale;
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	~SimWorker()
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						~SimWorker()
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	{
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						{
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					@ -631,6 +634,17 @@ struct SimWorker : SimShared
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		if (!vcdfile.is_open())
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							if (!vcdfile.is_open())
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			return;
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								return;
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							vcdfile << stringf("$version %s $end\n", yosys_version_str);
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							std::time_t t = std::time(nullptr);
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							char mbstr[255];
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							if (std::strftime(mbstr, sizeof(mbstr), "%c", std::localtime(&t))) {
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								vcdfile << stringf("$date ") << mbstr << stringf(" $end\n");
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							}
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							if (!timescale.empty())
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								vcdfile << stringf("$timescale %s $end\n", timescale.c_str());
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		int id = 1;
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							int id = 1;
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		top->write_vcd_header(vcdfile, id);
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							top->write_vcd_header(vcdfile, id);
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					@ -770,6 +784,9 @@ struct SimPass : public Pass {
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		log("    -zinit\n");
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							log("    -zinit\n");
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		log("        zero-initialize all uninitialized regs and memories\n");
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							log("        zero-initialize all uninitialized regs and memories\n");
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		log("\n");
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							log("\n");
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							log("    -timescale <string>\n");
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							log("        include the specified timescale declaration in the vcd\n");
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							log("\n");
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		log("    -n <integer>\n");
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							log("    -n <integer>\n");
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		log("        number of cycles to simulate (default: 20)\n");
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							log("        number of cycles to simulate (default: 20)\n");
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		log("\n");
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							log("\n");
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					@ -820,6 +837,10 @@ struct SimPass : public Pass {
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				worker.resetn.insert(RTLIL::escape_id(args[++argidx]));
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									worker.resetn.insert(RTLIL::escape_id(args[++argidx]));
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				continue;
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									continue;
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			}
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								}
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								if (args[argidx] == "-timescale" && argidx+1 < args.size()) {
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									worker.timescale = args[++argidx];
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									continue;
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								}
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			if (args[argidx] == "-a") {
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								if (args[argidx] == "-a") {
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				worker.hide_internal = false;
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									worker.hide_internal = false;
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				continue;
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									continue;
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