presentation progress

manual/PRESENTATION_Intro.tex

@@ -1,5 +1,5 @@
 
-\section{Introduction}
+\section{Introduction to Yosys}
 
 \begin{frame}
 \sectionpage
@@ -578,7 +578,9 @@ endmodule
 \end{lstlisting}
 \end{frame}
 
-\subsection{Verification}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+\subsection{Verification of Yosys}
 
 \begin{frame}{\subsecname}
 Contiously checking the correctness of Yosys and making sure that new features
@@ -694,3 +696,43 @@ copyright notice and this permission notice appear in all copies.
 
 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 
+\subsection{Typical Applications for Yosys}
+
+\begin{frame}{\subsecname}
+\begin{itemize}
+\item Synthesis of final production designs
+\item Pre-production synthesis (trial runs before investing in other tools)
+\item Convertion of full-featured Verilog to simple Verilog
+\item Convertion of Verilog to other formats (BLIF, BTOR, etc)
+\item Demonstrating synthesis algorithms (e.g. for educational purposes)
+\item Framework for experimenting with new algorithms
+\item Framework for building custom flows\footnote[frame]{Not limited to synthesis
+but also formal verification, reverse engineering, ...}
+\end{itemize}
+\end{frame}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+\subsection{Documentation, Downloads, Contatcs}
+
+\begin{frame}{\subsecname}
+\begin{itemize}
+\item Website: \\
+\smallskip\hskip1cm\url{http://www.clifford.at/yosys/}
+
+\bigskip
+\item Manual, Command Reference, Appliction Notes: \\
+\smallskip\hskip1cm\url{http://www.clifford.at/yosys/documentation.html}
+
+\bigskip
+\item Instead of a mailing list we have a SubReddit: \\
+\smallskip\hskip1cm\url{http://www.reddit.com/r/yosys/}
+
+\bigskip
+\item Direct link to the source code: \\
+\smallskip\hskip1cm\url{https://github.com/cliffordwolf/yosys}
+\end{itemize}
+\end{frame}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+