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xilinx: Use memory_libmap pass.

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This commit is contained in:
Marcelina Kościelnicka 2022-02-06 10:10:40 +01:00
parent e4d811561c
commit 3b2f95953c
40 changed files with 4540 additions and 2315 deletions
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17
tests/arch/xilinx/lutram.ys
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@ -33,8 +33,8 @@ design -load postopt
cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 8 t:FDRE
select -assert-count 8 t:RAM32X1D
select -assert-none t:BUFG t:FDRE t:RAM32X1D %% t:* %D
select -assert-count 1 t:RAM32M
select -assert-none t:BUFG t:FDRE t:RAM32M %% t:* %D
design -reset
@ -51,10 +51,11 @@ sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs mite
design -load postopt
cd lutram_1w1r
dump
select -assert-count 1 t:BUFG
select -assert-count 8 t:FDRE
select -assert-count 8 t:RAM64X1D
select -assert-none t:BUFG t:FDRE t:RAM64X1D %% t:* %D
select -assert-count 8 t:RAM64X1S
select -assert-none t:BUFG t:FDRE t:RAM64X1S %% t:* %D
design -reset
@ -133,8 +134,8 @@ design -load postopt
cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 6 t:FDRE
select -assert-count 2 t:RAM64M
select -assert-none t:BUFG t:FDRE t:RAM64M %% t:* %D
select -assert-count 6 t:RAM64X1S
select -assert-none t:BUFG t:FDRE t:RAM64X1S %% t:* %D
design -reset
@ -153,5 +154,5 @@ design -load postopt
cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 8 t:FDRE
select -assert-count 8 t:RAM16X1D
select -assert-none t:BUFG t:FDRE t:RAM16X1D %% t:* %D
select -assert-count 8 t:RAM16X1S
select -assert-none t:BUFG t:FDRE t:RAM16X1S %% t:* %D