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xilinx: Use memory_libmap pass.

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This commit is contained in:
Marcelina Kościelnicka 2022-02-06 10:10:40 +01:00
parent e4d811561c
commit 3b2f95953c
40 changed files with 4540 additions and 2315 deletions
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72
techlibs/xilinx/Makefile.inc
View file

@ -2,45 +2,37 @@
OBJS += techlibs/xilinx/synth_xilinx.o
OBJS += techlibs/xilinx/xilinx_dffopt.o
GENFILES += techlibs/xilinx/brams_init_36.vh
GENFILES += techlibs/xilinx/brams_init_32.vh
GENFILES += techlibs/xilinx/brams_init_18.vh
GENFILES += techlibs/xilinx/brams_init_16.vh
GENFILES += techlibs/xilinx/brams_init_9.vh
GENFILES += techlibs/xilinx/brams_init_8.vh
EXTRA_OBJS += techlibs/xilinx/brams_init.mk
.SECONDARY: techlibs/xilinx/brams_init.mk
techlibs/xilinx/brams_init.mk: techlibs/xilinx/brams_init.py
$(Q) mkdir -p techlibs/xilinx
$(P) $(PYTHON_EXECUTABLE) $<
$(Q) touch $@
techlibs/xilinx/brams_init_36.vh: techlibs/xilinx/brams_init.mk
techlibs/xilinx/brams_init_32.vh: techlibs/xilinx/brams_init.mk
techlibs/xilinx/brams_init_18.vh: techlibs/xilinx/brams_init.mk
techlibs/xilinx/brams_init_16.vh: techlibs/xilinx/brams_init.mk
techlibs/xilinx/brams_init_9.vh: techlibs/xilinx/brams_init.mk
techlibs/xilinx/brams_init_8.vh: techlibs/xilinx/brams_init.mk
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_sim.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_xtra.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc2v_brams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc2v_brams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc3sa_brams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc3sda_brams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_brams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_brams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_xcu_brams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_brams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcu_brams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcup_urams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcup_urams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut4_lutrams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut6_lutrams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lutrams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lutrams_xcv.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lutrams_xcv_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lutrams_xc5v.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lutrams_xcu.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lutrams_xc5v_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xcv.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xcv_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_defs.vh))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xc2v.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xc2v_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xc3sda.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xc3sda_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xc4v.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xc4v_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xc5v_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xc6v_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_xcu_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/urams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/urams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v))
@ -54,11 +46,3 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_dsp_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcu_dsp_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_model.v))
$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_36.vh))
$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh))
$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_18.vh))
$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_16.vh))
$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_9.vh))
$(eval $(call add_gen_share_file,share/xilinx,techlibs/xilinx/brams_init_8.vh))