3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-23 17:15:33 +00:00

opt_clean: Remove init attribute bits together with removed DFFs.

Fixes #2546.
This commit is contained in:
Marcelina Kościelnicka 2021-03-09 21:32:16 +01:00
parent f965b3fa54
commit 3af871f969
2 changed files with 24 additions and 11 deletions

View file

@ -21,6 +21,7 @@
#include "kernel/sigtools.h"
#include "kernel/log.h"
#include "kernel/celltypes.h"
#include "kernel/ffinit.h"
#include <stdlib.h>
#include <stdio.h>
#include <set>
@ -101,6 +102,7 @@ void rmunused_module_cells(Module *module, bool verbose)
pool<SigBit> used_raw_bits;
dict<SigBit, pool<Cell*>> wire2driver;
dict<SigBit, vector<string>> driver_driver_logs;
FfInitVals ffinit(&sigmap, module);
SigMap raw_sigmap;
for (auto &it : module->connections_) {
@ -193,6 +195,8 @@ void rmunused_module_cells(Module *module, bool verbose)
if (verbose)
log_debug(" removing unused `%s' cell `%s'.\n", cell->type.c_str(), cell->name.c_str());
module->design->scratchpad_set_bool("opt.did_something", true);
if (RTLIL::builtin_ff_cell_types().count(cell->type))
ffinit.remove_init(cell->getPort(ID::Q));
module->remove(cell);
count_rm_cells++;
}