mirror of
https://github.com/YosysHQ/yosys
synced 2026-07-14 11:15:40 +00:00
Added Testcase for bug1206
This commit is contained in:
parent
b88b73a99a
commit
3adb423e9e
1 changed files with 6 additions and 0 deletions
6
tests/rtlil/bug1206.ys
Normal file
6
tests/rtlil/bug1206.ys
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
logger -expect error "Wire width .* out of range" 1
|
||||
read_rtlil <<EOT
|
||||
module \foo
|
||||
wire width 1073741824 \bar
|
||||
end
|
||||
EOT
|
||||
Loading…
Add table
Add a link
Reference in a new issue