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https://github.com/YosysHQ/yosys
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Consistent use of 'override' for virtual methods in derived classes.
o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
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170 changed files with 414 additions and 416 deletions
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@ -27,7 +27,7 @@ PRIVATE_NAMESPACE_BEGIN
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struct OptPass : public Pass {
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OptPass() : Pass("opt", "perform simple optimizations") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -63,7 +63,7 @@ struct OptPass : public Pass {
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log("\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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std::string opt_clean_args;
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std::string opt_expr_args;
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@ -442,7 +442,7 @@ void rmunused_module(RTLIL::Module *module, bool purge_mode, bool verbose, bool
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struct OptCleanPass : public Pass {
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OptCleanPass() : Pass("opt_clean", "remove unused cells and wires") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -459,7 +459,7 @@ struct OptCleanPass : public Pass {
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log(" also remove internal nets if they have a public name\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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bool purge_mode = false;
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@ -505,7 +505,7 @@ struct OptCleanPass : public Pass {
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struct CleanPass : public Pass {
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CleanPass() : Pass("clean", "remove unused cells and wires") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -520,7 +520,7 @@ struct CleanPass : public Pass {
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log("in -purge mode between the commands.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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bool purge_mode = false;
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@ -169,7 +169,7 @@ void demorgan_worker(
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struct OptDemorganPass : public Pass {
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OptDemorganPass() : Pass("opt_demorgan", "Optimize reductions with DeMorgan equivalents") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -179,7 +179,7 @@ struct OptDemorganPass : public Pass {
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log("overall gate count of the circuit\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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log_header(design, "Executing OPT_DEMORGAN pass (push inverters through $reduce_* cells).\n");
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@ -1470,7 +1470,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
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struct OptExprPass : public Pass {
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OptExprPass() : Pass("opt_expr", "perform const folding and simple expression rewriting") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -1504,7 +1504,7 @@ struct OptExprPass : public Pass {
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log(" replaced by 'a'. the -keepdc option disables all such optimizations.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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bool mux_undef = false;
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bool mux_bool = false;
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@ -341,7 +341,7 @@ struct OptMergeWorker
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struct OptMergePass : public Pass {
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OptMergePass() : Pass("opt_merge", "consolidate identical cells") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -357,7 +357,7 @@ struct OptMergePass : public Pass {
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log(" Operate on all cell types, not just built-in types.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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log_header(design, "Executing OPT_MERGE pass (detect identical cells).\n");
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@ -449,7 +449,7 @@ struct OptMuxtreeWorker
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struct OptMuxtreePass : public Pass {
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OptMuxtreePass() : Pass("opt_muxtree", "eliminate dead trees in multiplexer trees") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -462,7 +462,7 @@ struct OptMuxtreePass : public Pass {
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log("This pass only operates on completely selected modules without processes.\n");
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log("\n");
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}
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virtual void execute(vector<std::string> args, RTLIL::Design *design)
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void execute(vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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log_header(design, "Executing OPT_MUXTREE pass (detect dead branches in mux trees).\n");
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extra_args(args, 1, design);
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@ -329,7 +329,7 @@ struct OptReduceWorker
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struct OptReducePass : public Pass {
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OptReducePass() : Pass("opt_reduce", "simplify large MUXes and AND/OR gates") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -350,7 +350,7 @@ struct OptReducePass : public Pass {
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log(" alias for -fine\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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bool do_fine = false;
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@ -399,7 +399,7 @@ delete_dff:
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struct OptRmdffPass : public Pass {
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OptRmdffPass() : Pass("opt_rmdff", "remove DFFs with constant inputs") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -409,7 +409,7 @@ struct OptRmdffPass : public Pass {
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log("a constant driver.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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int total_count = 0, total_initdrv = 0;
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log_header(design, "Executing OPT_RMDFF pass (remove dff with constant values).\n");
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@ -28,7 +28,7 @@ PRIVATE_NAMESPACE_BEGIN
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struct RmportsPassPass : public Pass {
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RmportsPassPass() : Pass("rmports", "remove module ports with no connections") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -39,7 +39,7 @@ struct RmportsPassPass : public Pass {
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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log_header(design, "Executing RMPORTS pass (remove ports with no connections).\n");
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@ -1421,7 +1421,7 @@ struct ShareWorker
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struct SharePass : public Pass {
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SharePass() : Pass("share", "perform sat-based resource sharing") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" Only perform the first N merges, then stop. This is useful for debugging.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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ShareWorkerConfig config;
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@ -353,7 +353,7 @@ struct WreduceWorker
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struct WreducePass : public Pass {
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WreducePass() : Pass("wreduce", "reduce the word size of operations if possible") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" flows that use the 'memory_memx' pass.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, Design *design)
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void execute(std::vector<std::string> args, Design *design) YS_OVERRIDE
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{
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WreduceConfig config;
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bool opt_memx = false;
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