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https://github.com/YosysHQ/yosys
synced 2025-04-25 01:55:33 +00:00
Consistent use of 'override' for virtual methods in derived classes.
o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
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170 changed files with 414 additions and 416 deletions
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@ -1,4 +1,4 @@
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/*
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/* -*- c++ -*-
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
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@ -282,9 +282,9 @@ namespace AST
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struct AstModule : RTLIL::Module {
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AstNode *ast;
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bool nolatches, nomeminit, nomem2reg, mem2reg, lib, noopt, icells, autowire;
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virtual ~AstModule();
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virtual RTLIL::IdString derive(RTLIL::Design *design, dict<RTLIL::IdString, RTLIL::Const> parameters, bool mayfail);
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virtual RTLIL::Module *clone() const;
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~AstModule() YS_OVERRIDE;
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RTLIL::IdString derive(RTLIL::Design *design, dict<RTLIL::IdString, RTLIL::Const> parameters, bool mayfail) YS_OVERRIDE;
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RTLIL::Module *clone() const YS_OVERRIDE;
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};
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// this must be set by the language frontend before parsing the sources
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@ -550,7 +550,7 @@ error:
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struct BlifFrontend : public Frontend {
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BlifFrontend() : Frontend("blif", "read BLIF file") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -566,7 +566,7 @@ struct BlifFrontend : public Frontend {
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log(" multi-bit port 'name'.\n");
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log("\n");
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}
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virtual void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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bool sop_mode = false;
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bool wideports = false;
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@ -35,7 +35,7 @@ YOSYS_NAMESPACE_BEGIN
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struct IlangFrontend : public Frontend {
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IlangFrontend() : Frontend("ilang", "read modules from ilang file") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -45,7 +45,7 @@ struct IlangFrontend : public Frontend {
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log("representation of a design in yosys's internal format.)\n");
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log("\n");
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}
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virtual void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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log_header(design, "Executing ILANG frontend.\n");
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extra_args(f, filename, args, 1);
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@ -494,7 +494,7 @@ void json_import(Design *design, string &modname, JsonNode *node)
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struct JsonFrontend : public Frontend {
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JsonFrontend() : Frontend("json", "read JSON file") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -504,7 +504,7 @@ struct JsonFrontend : public Frontend {
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log("for a description of the file format.\n");
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log("\n");
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}
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virtual void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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log_header(design, "Executing JSON frontend.\n");
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@ -452,7 +452,7 @@ void parse_type_map(std::map<std::string, std::tuple<int, int, bool>> &type_map,
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struct LibertyFrontend : public Frontend {
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LibertyFrontend() : Frontend("liberty", "read cells from liberty file") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -485,7 +485,7 @@ struct LibertyFrontend : public Frontend {
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log(" set the specified attribute (to the value 1) on all loaded modules\n");
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log("\n");
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}
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virtual void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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bool flag_lib = false;
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bool flag_nooverwrite = false;
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@ -1685,7 +1685,7 @@ bool check_noverific_env()
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struct VerificPass : public Pass {
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VerificPass() : Pass("verific", "load Verilog and VHDL designs using Verific") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -1784,7 +1784,7 @@ struct VerificPass : public Pass {
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log("\n");
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}
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#ifdef YOSYS_ENABLE_VERIFIC
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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if (check_noverific_env())
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log_cmd_error("This version of Yosys is built without Verific support.\n");
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@ -2162,7 +2162,7 @@ struct VerificPass : public Pass {
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}
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#else /* YOSYS_ENABLE_VERIFIC */
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virtual void execute(std::vector<std::string>, RTLIL::Design *) {
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void execute(std::vector<std::string>, RTLIL::Design *) YS_OVERRIDE {
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log_cmd_error("This version of Yosys is built without Verific support.\n");
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}
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#endif
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@ -2170,7 +2170,7 @@ struct VerificPass : public Pass {
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struct ReadPass : public Pass {
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ReadPass() : Pass("read", "load HDL designs") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -2203,7 +2203,7 @@ struct ReadPass : public Pass {
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log("Add directory to global Verilog/SystemVerilog include directories.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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if (args.size() < 2)
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log_cmd_error("Missing mode parameter.\n");
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@ -49,7 +49,7 @@ static void error_on_dpi_function(AST::AstNode *node)
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struct VerilogFrontend : public Frontend {
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VerilogFrontend() : Frontend("verilog", "read modules from Verilog file") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -180,7 +180,7 @@ struct VerilogFrontend : public Frontend {
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log("supported by the Yosys Verilog front-end.\n");
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log("\n");
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}
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virtual void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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bool flag_dump_ast1 = false;
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bool flag_dump_ast2 = false;
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struct VerilogDefaults : public Pass {
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VerilogDefaults() : Pass("verilog_defaults", "set default options for read_verilog") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -416,7 +416,7 @@ struct VerilogDefaults : public Pass {
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log("not imply -clear.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design*)
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void execute(std::vector<std::string> args, RTLIL::Design*) YS_OVERRIDE
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{
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if (args.size() < 2)
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cmd_error(args, 1, "Missing argument.");
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@ -453,7 +453,7 @@ struct VerilogDefaults : public Pass {
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struct VerilogDefines : public Pass {
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VerilogDefines() : Pass("verilog_defines", "define and undefine verilog defines") { }
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virtual void help()
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void help() YS_OVERRIDE
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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@ -469,7 +469,7 @@ struct VerilogDefines : public Pass {
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log(" undefine the preprocessor symbol 'name'\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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size_t argidx;
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for (argidx = 1; argidx < args.size(); argidx++) {
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