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Merge pull request #3518 from jix/smtmap
Add smtmap.v describing the smt2 backend's behavior for undef bits
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commit
3a37597e9f
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@ -22,6 +22,7 @@ kernel/register.o: techlibs/common/simlib_help.inc techlibs/common/simcells_help
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$(eval $(call add_share_file,share,techlibs/common/simlib.v))
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$(eval $(call add_share_file,share,techlibs/common/simcells.v))
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$(eval $(call add_share_file,share,techlibs/common/techmap.v))
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$(eval $(call add_share_file,share,techlibs/common/smtmap.v))
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$(eval $(call add_share_file,share,techlibs/common/pmux2mux.v))
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$(eval $(call add_share_file,share,techlibs/common/adff2dff.v))
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$(eval $(call add_share_file,share,techlibs/common/dff2ff.v))
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28
techlibs/common/smtmap.v
Normal file
28
techlibs/common/smtmap.v
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@ -0,0 +1,28 @@
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(* techmap_celltype = "$pmux" *)
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module smt_pmux (A, B, S, Y);
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parameter WIDTH = 1;
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parameter S_WIDTH = 1;
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(* force_downto *)
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input [WIDTH-1:0] A;
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(* force_downto *)
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input [WIDTH*S_WIDTH-1:0] B;
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(* force_downto *)
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input [S_WIDTH-1:0] S;
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(* force_downto *)
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output [WIDTH-1:0] Y;
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(* force_downto *)
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wire [WIDTH-1:0] Y_B;
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genvar i, j;
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generate
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(* force_downto *)
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wire [WIDTH*(S_WIDTH+1)-1:0] C;
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assign C[WIDTH-1:0] = A;
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for (i = 0; i < S_WIDTH; i = i + 1)
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assign C[WIDTH*(i+2)-1:WIDTH*(i+1)] = S[i] ? B[WIDTH*(i+1)-1:WIDTH*i] : C[WIDTH*(i+1)-1:WIDTH*i];
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assign Y = C[WIDTH*(S_WIDTH+1)-1:WIDTH*S_WIDTH];
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endgenerate
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endmodule
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