mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-23 17:15:33 +00:00
Code Activity

tests: Update path to sim model

Browse source
This commit is contained in:
Martin Povišer 2025-03-11 17:11:11 +01:00
parent b6a9d78507
commit 397f748dd2
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
tests/verific/blackbox_ql.ys
View file

@ -1,4 +1,4 @@
verific -sv -lib +/quicklogic/qlf_k6n10f/dsp_sim.v
verific -sv -lib +/quicklogic/qlf_k6n10f/dspv1_sim.v
verific -sv <<EOF
module top (