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Fix #938 - Crash occurs in case when use write_firrtl command

Add missing memory initialization.
Sanity-check memory parameters.
Add Cell pointer to memory object (for error reporting).
This commit is contained in:
Jim Lawson 2019-05-01 13:16:01 -07:00
parent e35fe1344d
commit 38f5424f92
3 changed files with 64 additions and 4 deletions

View file

@ -0,0 +1,22 @@
module top
(
input [7:0] data_a,
input [6:1] addr_a,
input we_a, clk,
output reg [7:0] q_a
);
// Declare the RAM variable
reg [7:0] ram[63:0];
// Port A
always @ (posedge clk)
begin
if (we_a)
begin
ram[addr_a] <= data_a;
q_a <= data_a;
end
q_a <= ram[addr_a];
end
endmodule

View file

@ -16,6 +16,7 @@ operators.v $pow
partsel.v drops modules
process.v drops modules
realexpr.v drops modules
retime.v Initial value (11110101) for (retime_test.ff) not supported
scopes.v original verilog issues ( -x where x isn't declared signed)
sincos.v $adff
specify.v no code (empty module generates error