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Fix #1496.
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2 changed files with 21 additions and 4 deletions
13
tests/various/bug1496.ys
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13
tests/various/bug1496.ys
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read_ilang << EOF
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module \top
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wire input 1 \A
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wire output 2 \Y
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cell $_AND_ \sub
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connect \A \A
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connect \B 1'0
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connect \Y \Y
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end
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end
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EOF
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extract_fa
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