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	Update CHANGELOG
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							|  | @ -5,6 +5,11 @@ List of major changes and improvements between releases | |||
| Yosys 0.14 .. Yosys 0.14-dev | ||||
| -------------------------- | ||||
| 
 | ||||
|  * Various | ||||
|     - clk2fflogic: nice names for autogenerated signals | ||||
|     - simulation include support for all flip-flop types. | ||||
|     - Added AIGER witness file co-simulation. | ||||
| 
 | ||||
|  * Verilog | ||||
|     - Fixed evaluation of constant functions with variables or arguments with | ||||
|       reversed dimensions | ||||
|  | @ -14,6 +19,13 @@ Yosys 0.14 .. Yosys 0.14-dev | |||
| 
 | ||||
|  * SystemVerilog | ||||
|     - Added support for accessing whole sub-structures in expressions | ||||
|   | ||||
|  * New commands and options | ||||
|     - Added glift command, used to create gate-level information flow tracking | ||||
|       (GLIFT) models by the "constructive mapping" approach | ||||
| 
 | ||||
|  * Verific support | ||||
|     - Ability to override default parser mode for verific -f command. | ||||
| 
 | ||||
| Yosys 0.13 .. Yosys 0.14 | ||||
| -------------------------- | ||||
|  |  | |||
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