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docs: Amend modports support to all SVI

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Also some formatting fixes.
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Krystine Sherwin 2025-10-15 09:17:52 +13:00
parent 7bb0a1913e
commit 37ba29482e
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15
docs/source/using_yosys/verilog.rst
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@ -356,24 +356,29 @@ from SystemVerilog:
files being read into the same design afterwards. files being read into the same design afterwards.
- typedefs are supported (including inside packages) - typedefs are supported (including inside packages)
- type casts are currently not supported - type casts are currently not supported
- enums are supported (including inside packages) - enums are supported (including inside packages)
- but are currently not strongly typed - but are currently not strongly typed
- packed structs and unions are supported - packed structs and unions are supported
- arrays of packed structs/unions are currently not supported - arrays of packed structs/unions are currently not supported
- structure literals are currently not supported - structure literals are currently not supported
- multidimensional arrays are supported - multidimensional arrays are supported
- array assignment of unpacked arrays is currently not supported - array assignment of unpacked arrays is currently not supported
- array literals are currently not supported - array literals are currently not supported
- SystemVerilog interfaces (SVIs) are supported. Modports for specifying whether - SystemVerilog interfaces (SVIs), including modports for specifying whether
ports are inputs or outputs are supported when used with named arguments, but ports are inputs or outputs, are partially supported.
not positional arguments. i.e. ``driver_mod d0(.intf(intf0),
.in(inputs[0]));`` is supported but ``driver_mod d0(intf0, inputs[0]);`` is - interfaces must be provided as *named* arguments, not positional arguments.
not. i.e. ``foo bar(.intf(intf0), .x(x));`` is supported but ``foo bar(intf0,
x);`` is not.
- Assignments within expressions are supported. - Assignments within expressions are supported.