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Progress in memory_bram
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parent
24ae156a74
commit
36c20f2ede
4 changed files with 42 additions and 23 deletions
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@ -30,6 +30,7 @@ struct rules_t
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SigBit sig_clock;
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SigSpec sig_addr, sig_data, sig_en;
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bool effective_clkpol;
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int mapped_port;
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};
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@ -320,6 +321,7 @@ bool replace_cell(Cell *cell, const rules_t::bram_t &bram, const rules_t::match_
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if (clken) {
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clock_domains[pi.clocks] = clkdom;
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pi.sig_clock = clkdom.first;
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pi.effective_clkpol = clkdom.second;
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}
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pi.sig_en = sig_en;
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@ -405,6 +407,7 @@ grow_read_ports:;
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if (clken) {
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clock_domains[pi.clocks] = clkdom;
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pi.sig_clock = clkdom.first;
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pi.effective_clkpol = clkdom.second;
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}
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pi.sig_addr = rd_addr.extract(cell_port_i*mem_abits, mem_abits);
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@ -483,7 +486,13 @@ grow_read_ports:;
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bram_dout.remove(i);
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}
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dout_cache[sig_data].first.append(addr_ok);
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SigSpec addr_ok_q = addr_ok;
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if (pi.clocks && !addr_ok.empty()) {
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addr_ok_q = module->addWire(NEW_ID);
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module->addDff(NEW_ID, pi.sig_clock, addr_ok, addr_ok_q, pi.effective_clkpol);
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}
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dout_cache[sig_data].first.append(addr_ok_q);
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dout_cache[sig_data].second.append(bram_dout);
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}
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