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presentation progress

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Clifford Wolf 2014-01-30 15:25:09 +01:00
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commit 36a808c572
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@ -92,9 +92,9 @@ Yosys is an Open Source Verilog synthesis tool, and more.
Outline of this presentation:
\begin{itemize}
\item Introduction to the field and Yosys
\item Yosys usage examples (synthesis)
\item Yosys usage examples (advanced synthesis)
\item Yosys usage examples (beyond synthesis)
\item Yosys by example: synthesis
\item Yosys by example: advanced synthesis
\item Yosys by example: beyond synthesis
\item Programming Yosys extensions
\end{itemize}
\end{frame}