mirror of
https://github.com/YosysHQ/yosys
synced 2025-08-26 04:56:05 +00:00
machxo2: Use attrmvcp pass to move LOC and src attributes from ports/wires to IO cells.
This commit is contained in:
parent
124780ecd9
commit
3674eb34d4
2 changed files with 17 additions and 1 deletions
|
@ -188,3 +188,15 @@ module OSCH #(
|
|||
output SEDSTDBY
|
||||
);
|
||||
endmodule
|
||||
|
||||
// IO- "$__" cells for the iopadmap pass. These are temporary cells not meant
|
||||
// to be instantiated by the end user. They are required in this file for
|
||||
// attrmvcp to work.
|
||||
(* blackbox *)
|
||||
module \$__FACADE_OUTPAD (input I, output O); endmodule
|
||||
(* blackbox *)
|
||||
module \$__FACADE_INPAD (input I, output O); endmodule
|
||||
(* blackbox *)
|
||||
module \$__FACADE_TOUTPAD (input I, OE, output O); endmodule
|
||||
(* blackbox *)
|
||||
module \$__FACADE_TINOUTPAD (input I, OE, output O, inout B); endmodule
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue