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More fixes in ternary op sign handling
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@ -998,6 +998,9 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
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// generate multiplexer for ternary operator (aka ?:-operator)
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case AST_TERNARY:
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{
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if (width_hint < 0)
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detectSignWidth(width_hint, sign_hint);
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RTLIL::SigSpec cond = children[0]->genRTLIL();
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RTLIL::SigSpec val1 = children[1]->genRTLIL(width_hint, sign_hint);
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RTLIL::SigSpec val2 = children[2]->genRTLIL(width_hint, sign_hint);
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