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Proper write of memory data

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This commit is contained in:
Miodrag Milanovic 2022-03-11 11:19:53 +01:00
parent 295b0d1899
commit 357336339a
1 changed files with 13 additions and 14 deletions
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27
passes/sat/sim.cc
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@ -326,6 +326,16 @@ struct SimInstance
return did_something; return did_something;
} }
void set_memory_state(IdString memid, Const addr, Const data)
{
auto &state = mem_database[memid];
int offset = (addr.as_int() - state.mem->start_offset) * state.mem->width;
for (int i = 0; i < GetSize(data); i++)
if (0 <= i+offset && i+offset < GetSize(data))
state.data.bits[i+offset] = data.bits[i];
}
void update_cell(Cell *cell) void update_cell(Cell *cell)
{ {
if (ff_database.count(cell)) if (ff_database.count(cell))
@ -1230,11 +1240,6 @@ struct SimWorker : SimShared
int curr_cycle = 0; int curr_cycle = 0;
std::vector<std::string> parts; std::vector<std::string> parts;
size_t len = 0; size_t len = 0;
dict<IdString, Mem*> mem_dict;
for (auto &mem : top->memories) {
mem.narrow();
mem_dict[mem.memid] = &mem;
}
while (!f.eof()) while (!f.eof())
{ {
std::string line; std::string line;
@ -1298,15 +1303,9 @@ struct SimWorker : SimShared
if (!c->is_mem_cell()) if (!c->is_mem_cell())
log_error("Cell %s is not memory cell in module %s\n",log_id(escaped_s),log_id(topmod)); log_error("Cell %s is not memory cell in module %s\n",log_id(escaped_s),log_id(topmod));
Mem *mem = mem_dict[c->parameters.at(ID::MEMID).decode_string()]; Const addr = Const::from_string(parts[1].substr(1,parts[1].size()-2));
mem->clear_inits(); Const data = Const::from_string(parts[2]);
MemInit minit; top->set_memory_state(c->parameters.at(ID::MEMID).decode_string(), addr, data);
minit.addr = Const::from_string(parts[1].substr(1,parts[1].size()-2));
minit.data = Const::from_string(parts[2]);
log("[%s] = %s\n",log_signal(minit.addr), log_signal(minit.data));
minit.en = Const(State::S1, mem->width);
mem->inits.push_back(minit);
mem->emit();
} }
break; break;
} }