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Added SystemVerilog support for ++ and --

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This commit is contained in:
Clifford Wolf 2017-02-23 11:21:33 +01:00
parent d25b6a72ee
commit 34d4e72132
2 changed files with 12 additions and 1 deletions
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4
frontends/verilog/verilog_lexer.l
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@ -366,7 +366,9 @@ import[ \t\r\n]+\"(DPI|DPI-C)\"[ \t\r\n]+function[ \t\r\n]+ {
"<<<" { return OP_SSHL; }
">>>" { return OP_SSHR; }
"::" { SV_KEYWORD(TOK_PACKAGESEP); }
"::" { return TOK_PACKAGESEP; }
"++" { return TOK_INCREMENT; }
"--" { return TOK_DECREMENT; }
"+:" { return TOK_POS_INDEXED; }
"-:" { return TOK_NEG_INDEXED; }