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Add opt_lut_ins pass. (#1673)
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10 changed files with 367 additions and 4 deletions
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@ -18,13 +18,13 @@ proc
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equiv_opt -assert -map +/gowin/cells_sim.v synth_gowin # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd mux4 # Constrain all select calls below inside the top module
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select -assert-count 4 t:LUT4
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select -assert-count 4 t:LUT*
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select -assert-count 2 t:MUX2_LUT5
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select -assert-count 1 t:MUX2_LUT6
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select -assert-count 6 t:IBUF
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select -assert-count 1 t:OBUF
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select -assert-none t:LUT4 t:MUX2_LUT6 t:MUX2_LUT5 t:IBUF t:OBUF %% t:* %D
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select -assert-none t:LUT* t:MUX2_LUT6 t:MUX2_LUT5 t:IBUF t:OBUF %% t:* %D
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design -load read
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hierarchy -top mux8
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@ -35,7 +35,7 @@ cd mux8 # Constrain all select calls below inside the top module
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select -assert-count 11 t:IBUF
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select -assert-count 1 t:OBUF
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select -assert-none t:LUT4 t:MUX2_LUT6 t:MUX2_LUT5 t:IBUF t:OBUF %% t:* %D
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select -assert-none t:LUT* t:MUX2_LUT6 t:MUX2_LUT5 t:IBUF t:OBUF %% t:* %D
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design -load read
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hierarchy -top mux16
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@ -46,4 +46,4 @@ cd mux16 # Constrain all select calls below inside the top module
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select -assert-count 20 t:IBUF
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select -assert-count 1 t:OBUF
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select -assert-none t:LUT4 t:MUX2_LUT6 t:MUX2_LUT5 t:MUX2_LUT6 t:MUX2_LUT7 t:MUX2_LUT8 t:IBUF t:OBUF %% t:* %D
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select -assert-none t:GND t:VCC t:LUT* t:MUX2_LUT6 t:MUX2_LUT5 t:MUX2_LUT6 t:MUX2_LUT7 t:MUX2_LUT8 t:IBUF t:OBUF %% t:* %D
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