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ecp5: add synth_ecp5 -dff to work with -abc9

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This commit is contained in:
Eddie Hung 2020-04-14 07:51:23 -07:00
parent e38b1280f9
commit 34c7732642
2 changed files with 47 additions and 12 deletions
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21
techlibs/ecp5/cells_sim.v
View file

@ -294,6 +294,7 @@ endmodule
// ---------------------------------------
(* abc9_flop=(SRMODE != "ASYNC"), lib_whitebox=(SRMODE != "ASYNC") *)
module TRELLIS_FF(input CLK, LSR, CE, DI, M, output reg Q);
parameter GSR = "ENABLED";
parameter [127:0] CEMUX = "1";
@ -340,6 +341,26 @@ module TRELLIS_FF(input CLK, LSR, CE, DI, M, output reg Q);
Q <= DI;
end
endgenerate
generate
// TODO
if (CLKMUX == "INV")
specify
$setup(DI, negedge CLK, 0);
$setup(CE, negedge CLK, 0);
$setup(LSR, negedge CLK, 0);
if (muxlsr) (negedge CLK => (Q : DI)) = 0;
if (!muxlsr && muxce) (negedge CLK => (Q : srval)) = 0;
endspecify
else
specify
$setup(DI, posedge CLK, 0);
$setup(CE, posedge CLK, 0);
$setup(LSR, posedge CLK, 0);
if (muxlsr) (posedge CLK => (Q : srval)) = 0;
if (!muxlsr && muxce) (posedge CLK => (Q : DI)) = 0;
endspecify
endgenerate
endmodule
// ---------------------------------------

38
techlibs/ecp5/synth_ecp5.cc
View file

@ -66,6 +66,9 @@ struct SynthEcp5Pass : public ScriptPass
log(" -noflatten\n");
log(" do not flatten design before synthesis\n");
log("\n");
log(" -dff\n");
log(" run 'abc'/'abc9' with -dff option\n");
log("\n");
log(" -retime\n");
log(" run 'abc' with '-dff -D 1' options\n");
log("\n");
@ -107,7 +110,7 @@ struct SynthEcp5Pass : public ScriptPass
}
string top_opt, blif_file, edif_file, json_file;
bool noccu2, nodffe, nobram, nolutram, nowidelut, asyncprld, flatten, retime, abc2, abc9, nodsp, vpr;
bool noccu2, nodffe, nobram, nolutram, nowidelut, asyncprld, flatten, dff, retime, abc2, abc9, nodsp, vpr;
void clear_flags() YS_OVERRIDE
{
@ -122,6 +125,7 @@ struct SynthEcp5Pass : public ScriptPass
nowidelut = false;
asyncprld = false;
flatten = true;
dff = false;
retime = false;
abc2 = false;
vpr = false;
@ -169,6 +173,10 @@ struct SynthEcp5Pass : public ScriptPass
flatten = false;
continue;
}
if (args[argidx] == "-dff") {
dff = true;
continue;
}
if (args[argidx] == "-retime") {
retime = true;
continue;
@ -307,6 +315,8 @@ struct SynthEcp5Pass : public ScriptPass
run("opt_clean");
if (!nodffe)
run("dff2dffe -direct-match $_DFF_* -direct-match $__DFFS_*");
if ((abc9 && dff) || help_mode)
run("zinit -all", "(-abc9 and -dff only)");
run(stringf("techmap -D NO_LUT %s -map +/ecp5/cells_map.v", help_mode ? "[-D ASYNC_PRLD]" : (asyncprld ? "-D ASYNC_PRLD" : "")));
run("opt_expr -undriven -mux_undef");
run("simplemap");
@ -323,7 +333,7 @@ struct SynthEcp5Pass : public ScriptPass
std::string techmap_args = asyncprld ? "" : "-map +/ecp5/latches_map.v";
if (abc9)
techmap_args += " -map +/ecp5/abc9_map.v -max_iter 1";
if (!asyncprld || abc9)
if (!techmap_args.empty())
run("techmap " + techmap_args);
if (abc9) {
@ -337,26 +347,30 @@ struct SynthEcp5Pass : public ScriptPass
else
abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k).c_str());
if (nowidelut)
run("abc9 -maxlut 4 -W 200");
else
run("abc9 -W 200");
abc9_args += " -maxlut 4";
if (dff)
abc9_args += " -dff";
run("abc9" + abc9_args);
run("techmap -map +/ecp5/abc9_unmap.v");
} else {
std::string abc_args = " -dress";
if (nowidelut)
run("abc -lut 4 -dress");
abc_args += " -lut 4";
else
run("abc -lut 4:7 -dress");
abc_args += " -lut 4:7";
if (dff)
abc_args += " -dff";
run("abc" + abc_args);
}
run("clean");
}
if (check_label("map_cells"))
{
if (vpr)
run("techmap -D NO_LUT -map +/ecp5/cells_map.v");
else
run("techmap -map +/ecp5/cells_map.v", "(with -D NO_LUT in vpr mode)");
if (help_mode)
run("techmap -map +/ecp5/cells_map.v", "(skip if -vpr)");
else if (!vpr)
run("techmap -map +/ecp5/cells_map.v");
run("opt_lut_ins -tech ecp5");
run("clean");
}