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intel_alm: Fix illegal carry chains
Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
parent
eb106732d9
commit
34a08750fa
4 changed files with 9 additions and 7 deletions
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@ -4,7 +4,7 @@ equiv_opt -assert -map +/intel_alm/common/alm_sim.v synth_intel_alm -family cycl
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd top # Constrain all select calls below inside the top module
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stat
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select -assert-count 8 t:MISTRAL_ALUT_ARITH
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select -assert-count 9 t:MISTRAL_ALUT_ARITH
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select -assert-none t:MISTRAL_ALUT_ARITH %% t:* %D
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design -reset
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@ -14,5 +14,5 @@ equiv_opt -assert -map +/intel_alm/common/alm_sim.v synth_intel_alm -family cycl
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd top # Constrain all select calls below inside the top module
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stat
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select -assert-count 8 t:MISTRAL_ALUT_ARITH
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select -assert-count 9 t:MISTRAL_ALUT_ARITH
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select -assert-none t:MISTRAL_ALUT_ARITH %% t:* %D
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@ -6,7 +6,7 @@ equiv_opt -async2sync -map +/intel_alm/common/alm_sim.v -map +/intel_alm/common/
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd top # Constrain all select calls below inside the top module
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select -assert-count 2 t:MISTRAL_NOT
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select -assert-count 1 t:MISTRAL_NOT
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select -assert-count 8 t:MISTRAL_ALUT_ARITH
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select -assert-count 8 t:MISTRAL_FF
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select -assert-none t:MISTRAL_NOT t:MISTRAL_ALUT_ARITH t:MISTRAL_FF %% t:* %D
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@ -21,7 +21,7 @@ equiv_opt -async2sync -map +/intel_alm/common/alm_sim.v -map +/intel_alm/common/
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd top # Constrain all select calls below inside the top module
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select -assert-count 2 t:MISTRAL_NOT
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select -assert-count 1 t:MISTRAL_NOT
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select -assert-count 8 t:MISTRAL_ALUT_ARITH
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select -assert-count 8 t:MISTRAL_FF
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select -assert-none t:MISTRAL_NOT t:MISTRAL_ALUT_ARITH t:MISTRAL_FF %% t:* %D
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