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Fixed typo in "verilog_write" help message

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acw1251 2018-09-18 13:34:30 -04:00 • committed by Jim Lawson
parent 6a809a1bb1
commit 33ac82a5fe
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manual/command-reference-manual.tex
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@ -4421,13 +4421,13 @@ Write the current design to a Verilog file.
-nodec
32-bit constant values are by default dumped as decimal numbers,
not bit pattern. This option decativates this feature and instead
not bit pattern. This option deactivates this feature and instead
will write out all constants in binary.
-nostr
Parameters and attributes that are specified as strings in the
original input will be output as strings by this back-end. This
decativates this feature and instead will write string constants
deactivates this feature and instead will write string constants
as binary numbers.
-defparam