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Merge pull request #1209 from YosysHQ/eddie/synth_xilinx

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[WIP] synth xilinx renaming, as per #1184
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Eddie Hung 2019-08-20 12:55:26 -07:00 • committed by GitHub
commit 33960dd3d8
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5 changed files with 23 additions and 16 deletions
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@ -14,6 +14,10 @@ Yosys 0.9 .. Yosys 0.9-dev
- Added "synth -abc9" (experimental)
- Added "script -scriptwire
- "synth_xilinx" to now infer wide multiplexers (-widemux <min> to enable)
- Renamed labels/options in synth_ice40 (e.g. dram -> map_lutram; -nodram -> -nolutram)
- Renamed labels/options in synth_ecp5 (e.g. dram -> map_lutram; -nodram -> -nolutram)
- Renamed labels in synth_intel (e.g. bram -> map_bram)
- Renamed labels/options in synth_xilinx (e.g. dram -> map_lutram; -nodram -> -nolutram)
- Added automatic gzip decompression for frontends
- Added $_NMUX_ cell type
- Added automatic gzip compression (based on filename extension) for backends