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Don't update used_signals for retained wires in rmunused_module_signals.

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These updates should not be necessary. In fact, if they were necessary, this code
would be buggy, because the results would depend on the order in which wires are traversed:
If wire A is retained, which causes an update to `used_signals`, which then causes wire B
to be retained when it otherwise wouldn't be, then we would get different results depending
on whether A is visited before B.

These updates will also make it difficult to process these wires in parallel.
This commit is contained in:
Robert O'Callahan 2026-01-19 02:44:54 +00:00
parent 125609105d
commit 32e96605d4
2 changed files with 10 additions and 2 deletions
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2
passes/opt/opt_clean.cc
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@ -467,8 +467,6 @@ bool rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool verbos
wire->attributes.erase(ID::init);
else
wire->attributes.at(ID::init) = initval;
used_signals.add(new_conn.first);
used_signals.add(new_conn.second);
module->connect(new_conn);
}

10
tests/opt/opt_clean_standalone_wires.ys Normal file
View file

@ -0,0 +1,10 @@
read_rtlil << EOT
module \test
wire \wire_a
wire \wire_f
connect \wire_f \wire_a
end
EOT
opt_clean
select -assert-count 0 */*