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Merge pull request #4065 from daglem/fix-AST_SHIFT-AST_SHIFTX

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Respect the sign of the right operand of AST_SHIFT and AST_SHIFTX
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Martin Povišer 2023-12-12 11:47:29 +01:00 • committed by GitHub
commit 320e75a3e3
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1 changed files with 2 additions and 1 deletions
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frontends/ast/genrtlil.cc
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@ -1740,7 +1740,8 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
if (width_hint < 0) if (width_hint < 0)
detectSignWidth(width_hint, sign_hint); detectSignWidth(width_hint, sign_hint);
RTLIL::SigSpec left = children[0]->genRTLIL(width_hint, sign_hint); RTLIL::SigSpec left = children[0]->genRTLIL(width_hint, sign_hint);
RTLIL::SigSpec right = children[1]->genRTLIL(); // for $shift and $shiftx, the second operand can be negative
RTLIL::SigSpec right = children[1]->genRTLIL(-1, type == AST_SHIFT || type == AST_SHIFTX);
int width = width_hint > 0 ? width_hint : left.size(); int width = width_hint > 0 ? width_hint : left.size();
is_signed = children[0]->is_signed; is_signed = children[0]->is_signed;
return binop2rtlil(this, type_name, width, left, right); return binop2rtlil(this, type_name, width, left, right);