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Apply opt_reduce WR_EN opts to the whole mux tree driving the WR_EN port
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@ -266,6 +266,21 @@ struct OptReduceWorker
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mem_wren_sigs.add(assign_map(cell->connections["\\D"]));
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mem_wren_sigs.add(assign_map(cell->connections["\\D"]));
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}
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}
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bool keep_expanding_mem_wren_sigs = true;
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while (keep_expanding_mem_wren_sigs) {
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keep_expanding_mem_wren_sigs = false;
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for (auto &cell_it : module->cells) {
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RTLIL::Cell *cell = cell_it.second;
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if (cell->type == "$mux" && mem_wren_sigs.check_any(assign_map(cell->connections["\\Y"]))) {
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if (!mem_wren_sigs.check_all(assign_map(cell->connections["\\A"])) ||
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!mem_wren_sigs.check_all(assign_map(cell->connections["\\B"])))
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keep_expanding_mem_wren_sigs = true;
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mem_wren_sigs.add(assign_map(cell->connections["\\A"]));
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mem_wren_sigs.add(assign_map(cell->connections["\\B"]));
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}
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}
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}
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while (did_something)
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while (did_something)
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{
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{
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did_something = false;
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did_something = false;
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