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minor cleanup and fixes

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This commit is contained in:
Artur Swiderski 2020-10-24 00:02:05 +02:00
parent 41f83c19fd
commit 309689da5b
11 changed files with 76 additions and 355 deletions
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14
techlibs/intel_le/common/le_sim.v
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@ -231,32 +231,30 @@ assign Q = ~A;
endmodule
(* abc9_box, lib_whitebox *)
module MISTRAL_ALUT_ARITH(input A, B, C, D, (* abc9_carry *) input CI, output , (* abc9_carry *) output CO);
module MISTRAL_ALUT_ARITH(input A, B, C, D, (* abc9_carry *) input CI, output SO, (* abc9_carry *) output CO);
parameter LUT = 16'h0000;
parameter sum_lutc_input = "cin";
`ifdef cycloneiv
`ifdef cycloneiv
specify
(A => SO) = 1342;
(B => SO) = 1323;
(C => SO) = 927;
(D0 => SO) = 887;
(D1 => SO) = 785;
(D => SO) = 887;
(CI => SO) = 368;
(A => CO) = 1082;
(B => CO) = 1062;
(C => CO) = 813;
(D0 => CO) = 866;
(D1 => CO) = 1198;
(D => CO) = 866;
(CI => CO) = 36; // Divided by 2 to account for there being two ALUT_ARITHs in an ALM)
endspecify
`endif
wire q0, q1;
assign q0 = LUT0 >> sum_lutc_input == "cin" : {D, CI, B, A},{D, C, B, A};
assign q1 = LUT0 >> sum_lutc_input == "cin" : {'b0, CI, B, A},{'b0, C, B, A};
assign q0 = LUT >> sum_lutc_input == "cin" ? {D, CI, B, A}:{D, C, B, A};
assign q1 = LUT >> sum_lutc_input == "cin" ? {'b1, CI, B, A}:{'b1, C, B, A};
assign SO = D ? q1 : q0;