Changes required for VPR place and route synth_xilinx.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>

manual/command-reference-manual.tex

@@ -4244,9 +4244,15 @@ compatible with 7-Series Xilinx devices.
         is omitted if this parameter is not specified.
 
     -vpr
-        generate an output netlist (and BLIF file) suitable for VPR
+        generate an output netlist (and BLIF file) suitable for VPR.
         (this feature is experimental and incomplete)
 
+    -no-brams
+		disable infering of block rams
+
+    -no-drams
+        disable infering of distributed rams
+
     -run <from_label>:<to_label>
         only run the commands between the labels (see below). an empty
         from label is synonymous to 'begin', and empty to label is
@@ -4274,11 +4280,11 @@ The following commands are executed by this synthesis command:
     coarse:
         synth -run coarse
 
-    bram:
+    bram: (only executed when '-no-brams' is not given)
         memory_bram -rules +/xilinx/brams.txt
         techmap -map +/xilinx/brams_map.v
 
-    dram:
+    dram: (only executed when '-no-drams' is not given)
         memory_bram -rules +/xilinx/drams.txt
         techmap -map +/xilinx/drams_map.v
 
@@ -4288,16 +4294,17 @@ The following commands are executed by this synthesis command:
         dffsr2dff
         dff2dffe
         opt -full
-        techmap -map +/techmap.v -map +/xilinx/arith_map.v
+        techmap -map +/techmap.v -map +/xilinx/arith_map.v -map +/xilinx/ff_map.v
         opt -fast
 
     map_luts:
-        abc -luts 2:2,3,6:5,10,20 [-dff]
+        abc -luts 2:2,3,6:5,10,20 [-dff] (without '-vpr' only!)
+        abc -lut 5 [-dff] (with '-vpr' only!)
         clean
 
     map_cells:
         techmap -map +/xilinx/cells_map.v (with -D NO_LUT in vpr mode)
-        dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT
+        dffinit -ff FDRE Q INIT -ff FDCE Q INIT -ff FDPE Q INIT -ff FDSE Q INIT
         clean
 
     check: