mirror of
https://github.com/YosysHQ/yosys
synced 2025-08-07 11:41:23 +00:00
iCE40 bram tests and fixes
This commit is contained in:
parent
d6f7698f59
commit
308a59aa18
6 changed files with 181 additions and 16 deletions
17
techlibs/ice40/tests/test_bram.sh
Normal file
17
techlibs/ice40/tests/test_bram.sh
Normal file
|
@ -0,0 +1,17 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -ex
|
||||
|
||||
for abits in 7 8 9 10 11 12; do
|
||||
for dbits in 2 4 8 16 24 32; do
|
||||
id="test_bram_${abits}_${dbits}"
|
||||
sed -e "s/ABITS = ./ABITS = $abits/g; s/DBITS = ./DBITS = $dbits/g;" < test_bram.v > ${id}.v
|
||||
sed -e "s/ABITS = ./ABITS = $abits/g; s/DBITS = ./DBITS = $dbits/g;" < test_bram_tb.v > ${id}_tb.v
|
||||
../../../yosys -ql ${id}_syn.log -p "synth_ice40" -o ${id}_syn.v ${id}.v
|
||||
iverilog -s bram_tb -o ${id}_tb ${id}_syn.v ${id}_tb.v /opt/lscc/iCEcube2.2014.08/verilog/sb_ice_syn.v
|
||||
# iverilog -s bram_tb -o ${id}_tb ${id}_syn.v ${id}_tb.v ../cells_sim.v
|
||||
./${id}_tb > ${id}_tb.txt
|
||||
if grep ERROR ${id}_tb.txt; then false; fi
|
||||
done; done
|
||||
echo OK
|
||||
|
Loading…
Add table
Add a link
Reference in a new issue