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rtlil: add source tracking to CaseRule actions

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This commit is contained in:
Emil J. Tywoniak 2025-11-02 11:25:42 +01:00
parent c45a035ebf
commit 304757c881
6 changed files with 15 additions and 14 deletions
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14
frontends/ast/genrtlil.cc
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@ -441,7 +441,7 @@ struct AST_INTERNAL::ProcessGenerator
RTLIL::SigSpec lhs = init_lvalue_c;
RTLIL::SigSpec rhs = init_rvalue.extract(offset, init_lvalue_c.width);
remove_unwanted_lvalue_bits(lhs, rhs);
sync->actions.push_back({lhs, rhs});
sync->actions.push_back({lhs, rhs, Const("")});
offset += lhs.size();
}
}
@ -573,7 +573,7 @@ struct AST_INTERNAL::ProcessGenerator
if (inSyncRule && lvalue_c.wire && lvalue_c.wire->get_bool_attribute(ID::nosync))
rhs = RTLIL::SigSpec(RTLIL::State::Sx, rhs.size());
remove_unwanted_lvalue_bits(lhs, rhs);
actions.push_back({lhs, rhs});
actions.push_back({lhs, rhs, ast ? ast->loc_string() : ""});
offset += lhs.size();
}
}
@ -613,7 +613,7 @@ struct AST_INTERNAL::ProcessGenerator
removeSignalFromCaseTree(lvalue, current_case);
remove_unwanted_lvalue_bits(lvalue, rvalue);
current_case->actions.push_back({lvalue, rvalue});
current_case->actions.push_back({lvalue, rvalue, ast->loc_string()});
}
break;
@ -729,8 +729,8 @@ struct AST_INTERNAL::ProcessGenerator
Wire *en = current_module->addWire(sstr.str() + "_EN", 1);
set_src_attr(en, ast);
proc->root_case.actions.push_back({en, SigSpec(false)});
current_case->actions.push_back({en, SigSpec(true)});
proc->root_case.actions.push_back({en, SigSpec(false), ast->loc_string()});
current_case->actions.push_back({en, SigSpec(true), ast->loc_string()});
RTLIL::SigSpec triggers;
RTLIL::Const::Builder polarity_builder;
@ -827,8 +827,8 @@ struct AST_INTERNAL::ProcessGenerator
Wire *en = current_module->addWire(cellname.str() + "_EN", 1);
set_src_attr(en, ast);
proc->root_case.actions.push_back({en, SigSpec(false)});
current_case->actions.push_back({en, SigSpec(true)});
proc->root_case.actions.push_back({en, SigSpec(false), ast->loc_string()});
current_case->actions.push_back({en, SigSpec(true), ast->loc_string()});
RTLIL::SigSpec triggers;
RTLIL::Const::Builder polarity_builder;