3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-07 18:05:24 +00:00

abc9_ops: discard $__ABC9_DELAY boxes

This commit is contained in:
Eddie Hung 2020-01-14 13:09:54 -08:00
parent aaafd784a5
commit 300003cb78

View file

@ -572,17 +572,12 @@ void reintegrate(RTLIL::Module *module)
log_assert(r.second);
}
pool<IdString> delay_boxes;
std::vector<Cell*> boxes;
for (auto cell : module->cells().to_vector()) {
if (cell->has_keep_attr())
continue;
if (cell->type.in(ID($_AND_), ID($_NOT_), ID($__ABC9_FF_)))
if (cell->type.in(ID($_AND_), ID($_NOT_), ID($__ABC9_FF_), ID($__ABC9_DELAY)))
module->remove(cell);
else if (cell->type.begins_with("$paramod$__ABC9_DELAY\\DELAY=")) {
delay_boxes.insert(cell->name);
module->remove(cell);
}
else if (cell->attributes.erase("\\abc9_box_seq"))
boxes.emplace_back(cell);
}
@ -674,7 +669,7 @@ void reintegrate(RTLIL::Module *module)
bit_drivers[i].insert(mapped_cell->name);
}
}
else if (delay_boxes.count(mapped_cell->name)) {
else if (mapped_cell->type == ID($__ABC9_DELAY)) {
SigBit I = mapped_cell->getPort(ID(i));
SigBit O = mapped_cell->getPort(ID(o));
if (I.wire)