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write_verilog: emit $check cell names as labels

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Robin Ole Heinemann 2025-01-30 10:15:53 +01:00 committed by Catherine
parent 954250d1df
commit 2f11dc87c9
1 changed files with 10 additions and 5 deletions
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15
backends/verilog/verilog_backend.cc
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@ -1044,16 +1044,21 @@ void dump_cell_expr_print(std::ostream &f, std::string indent, const RTLIL::Cell
void dump_cell_expr_check(std::ostream &f, std::string indent, const RTLIL::Cell *cell) void dump_cell_expr_check(std::ostream &f, std::string indent, const RTLIL::Cell *cell)
{ {
std::string flavor = cell->getParam(ID(FLAVOR)).decode_string(); std::string flavor = cell->getParam(ID(FLAVOR)).decode_string();
std::string label = "";
if (cell->name.isPublic()) {
label = stringf("%s: ", id(cell->name).c_str());
}
if (flavor == "assert") if (flavor == "assert")
f << stringf("%s" "assert (", indent.c_str()); f << stringf("%s" "%s" "assert (", indent.c_str(), label.c_str());
else if (flavor == "assume") else if (flavor == "assume")
f << stringf("%s" "assume (", indent.c_str()); f << stringf("%s" "%s" "assume (", indent.c_str(), label.c_str());
else if (flavor == "live") else if (flavor == "live")
f << stringf("%s" "assert (eventually ", indent.c_str()); f << stringf("%s" "%s" "assert (eventually ", indent.c_str(), label.c_str());
else if (flavor == "fair") else if (flavor == "fair")
f << stringf("%s" "assume (eventually ", indent.c_str()); f << stringf("%s" "%s" "assume (eventually ", indent.c_str(), label.c_str());
else if (flavor == "cover") else if (flavor == "cover")
f << stringf("%s" "cover (", indent.c_str()); f << stringf("%s" "%s" "cover (", indent.c_str(), label.c_str());
dump_sigspec(f, cell->getPort(ID::A)); dump_sigspec(f, cell->getPort(ID::A));
f << stringf(");\n"); f << stringf(");\n");
} }