mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-02-14 21:01:50 +00:00
Code Activity

tests: add formalff -clk2ff to fpga fsm.ys

Browse source
This commit is contained in:
Emil J. Tywoniak 2026-02-06 23:16:21 +01:00
parent c27803cb9f
commit 2e6d112a2d
12 changed files with 13 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

1
tests/arch/intel_alm/fsm.ys
View file

@ -6,6 +6,7 @@ flatten
equiv_opt -run :prove -map +/intel_alm/common/alm_sim.v -map +/intel_alm/common/dff_sim.v synth_intel_alm -family cyclonev -noiopad -noclkbuf
async2sync
miter -equiv -make_assert -flatten gold gate miter
formalff -clk2ff
sat -verify -prove-asserts -show-public -set-at 1 in_reset 1 -seq 20 -prove-skip 1 miter
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)