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tests: add formalff -clk2ff to fpga fsm.ys
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@ -4,6 +4,7 @@ proc
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flatten
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equiv_opt -run :prove -map +/ice40/cells_sim.v synth_ice40
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formalff -clk2ff
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miter -equiv -make_assert -flatten gold gate miter
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sat -verify -prove-asserts -show-public -set-at 1 in_reset 1 -seq 20 -prove-skip 1 miter
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