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verilog: check for module scope identifiers during width detection
The recent fix for case expression width detection causes the width of the expressions to be queried before they are simplified. Because the logic supporting module scope identifiers only existed in simplify, looking them up would fail during width detection. This moves the logic to a common helper used in both simplify() and detectSignWidthWorker().
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4 changed files with 41 additions and 13 deletions
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@ -326,6 +326,9 @@ namespace AST
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// helpers for locations
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std::string loc_string() const;
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// Helper for looking up identifiers which are prefixed with the current module name
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std::string try_pop_module_prefix() const;
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};
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// process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code
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