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Update passes/proc to avoid bits()

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This commit is contained in:
Robert O'Callahan 2025-08-28 03:53:34 +00:00
parent 5600eb2e5b
commit 2d5ce8c363
3 changed files with 12 additions and 14 deletions
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2
passes/proc/proc_memwr.cc
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@ -39,7 +39,7 @@ void proc_memwr(RTLIL::Module *mod, RTLIL::Process *proc, dict<IdString, int> &n
Const priority_mask(State::S0, port_id);
for (int i = 0; i < GetSize(prev_port_ids); i++)
if (memwr.priority_mask[i] == State::S1)
priority_mask.bits()[prev_port_ids[i]] = State::S1;
priority_mask.set(prev_port_ids[i], State::S1);
prev_port_ids.push_back(port_id);
RTLIL::Cell *cell = mod->addCell(NEW_ID, ID($memwr_v2));