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	Merge pull request #1667 from YosysHQ/clifford/verificnand
Add Verific support for OPER_REDUCE_NAND
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						2ce7a0d369
					
				
					 1 changed files with 8 additions and 0 deletions
				
			
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					@ -539,6 +539,14 @@ bool VerificImporter::import_netlist_instance_cells(Instance *inst, RTLIL::IdStr
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		return true;
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							return true;
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	}
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						}
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						if (inst->Type() == OPER_REDUCE_NAND) {
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							Wire *tmp = module->addWire(NEW_ID);
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							cell = module->addReduceAnd(inst_name, IN, tmp, SIGNED);
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							module->addNot(NEW_ID, tmp, net_map_at(inst->GetOutput()));
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							import_attributes(cell->attributes, inst);
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							return true;
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						}
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	if (inst->Type() == OPER_REDUCE_OR) {
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						if (inst->Type() == OPER_REDUCE_OR) {
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		cell = module->addReduceOr(inst_name, IN, net_map_at(inst->GetOutput()), SIGNED);
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							cell = module->addReduceOr(inst_name, IN, net_map_at(inst->GetOutput()), SIGNED);
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		import_attributes(cell->attributes, inst);
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							import_attributes(cell->attributes, inst);
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