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Added spice testbench to techlibs/cmos

This commit is contained in:
Clifford Wolf 2013-09-14 13:29:11 +02:00
parent bbe5aa446b
commit 2c9bd23801
5 changed files with 73 additions and 6 deletions

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@ -1,12 +1,12 @@
module counter (clk, rst, en, count);
input clk, rst, en;
output reg [3:0] count;
output reg [2:0] count;
always @(posedge clk)
if (rst)
count <= 4'd0;
count <= 3'd0;
else if (en)
count <= count + 4'd1;
count <= count + 3'd1;
endmodule