mirror of
https://github.com/YosysHQ/yosys
synced 2025-07-29 07:27:58 +00:00
abc9: break SCC by setting (* keep *) on output wires
This commit is contained in:
parent
a2c4d98da7
commit
2c65e1abac
4 changed files with 23 additions and 35 deletions
|
@ -298,7 +298,7 @@ struct Abc9Pass : public ScriptPass
|
|||
num_outputs);
|
||||
if (num_outputs) {
|
||||
run(stringf("%s -cwd %s", exe_cmd.str().c_str(), tempdir_name.c_str()));
|
||||
run(stringf("read_aiger -xaiger -wideports -module_name %s$abc9 -map %s/input.sym %s/output.aig", log_id(mod->name), tempdir_name.c_str(), tempdir_name.c_str()));
|
||||
run(stringf("read_aiger -xaiger -wideports -module_name %s$abc9 -map %s/input.sym %s/output.aig", log_id(mod), tempdir_name.c_str(), tempdir_name.c_str()));
|
||||
run("abc9_ops -reintegrate");
|
||||
}
|
||||
else
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue